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maq4123/maq4124/maq4125 automotive aec-q100 qualified dual 3a peak low-side mosfet driver bipolar/cmos/dmos process micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com july 2011 m9999-072511-a general description the maq4123/maq4124/maq4125 are a family of dual 3a buffer/mosfet drivers intended for driving power mosfets, igbts and other heavy loads (capacitive, resistive or inductive) which require low-impedance, high peak currents and fast switching times. they are available in inverting, non-inverting and complementary configurations. the maq4123/maq4124/maq4125 operate from a 4.5v to 20v supply, feature an ou tput resistance of 2.3 ? , sink or source 3a of peak current, and switch an 1800pf capacitive load in 10ns with typical propagation delay times of 50ns. the maq4123/maq4124/maq4125 feature ttl or cmos compatible inputs with 400mv of hysteresis to provide noise immunity. the inputs can withstand negative voltage swings of 5v and are latch-up protected to withstand 200ma of reverse current. the maq4123/maq4124/maq4125 are rated for the ? 40 c to +125 c operating temperature range, have been aec-q100 qualified for automotive applications, and are available in the epad soic-8 package for improved power dissipation and thermal performance required by automotive applications. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com . features ? automotive aec-q100 qualified ? high 3a peak output current ? wide 4.5v to 20v supply voltage range ? low 2.3 ? output resistance ? matched rise and fall times ? fast 10ns rise/fall times with 1800pf capacitive load ? low propagation delay time of 50ns (typical) ? ttl/cmos logic inputs independent of supply voltage ? latch-up protected to 200ma reverse current ? logic input withstands swing to ? 5v ? low equivalent 6pf input capacitance ? output voltage swings within 25mv of ground or vs ? low supply current ? 2.0ma with logic-1 input (maximum over temperature) ? 300 a with logic-0 input (maximum over temperature) ? ?426/7/8-, ?1426/7/8-, ?4426/7/8 industry standard pin out ? inverting, non-inverting, and differential configurations ? ? 40 c to +125 c temperature range ? exposed backside pad (epad) packaging for improved power dissipation
micrel, inc. maq4123/maq4124/maq4125 july 2011 2 m9999-072511-a ordering information part number configuration junction te mperature range lead finish package maq4123yme dual inverting ?40c to +125 c pb-free epad 8-pin soic MAQ4124YME dual non-inverting ?40c to +125 c pb-free epad 8-pin soic maq4125yme inverting + non-inverting ?40 c to +125 c pb-free epad 8-pin soic pin configuration epad soic-8 (me) epad soic (me) epad soic-8 (me) pin description pin number pin name pin function 1 nc not connected (may be left floating). 2 ina input. control input for the outa driver. 3 gnd ground. return for both output drive sections and ground reference for both input signals. 4 inb input. control input for the outb driver. 5 outb output drive. outb high-current drive pin. 6 vs supply. + 4.5v to + 20v. provides power to both driver outputs and internal control circuitry. 7 outa output drive. outa high-current driver pin. 8 nc not connected (may be left floating). epad ep exposed pad (epad). must make a full connec tion to the gnd plane to maximize thermal performance of the package.
micrel, inc. maq4123/maq4124/maq4125 july 2011 3 m9999-072511-a functional diagram
micrel, inc. maq4123/maq4124/maq4125 july 2011 4 m9999-072511-a absolute maximum ratings (1) supply voltage (v s )..................................................... +24v input voltage (v in ) .......................... v s + 0.3v to gnd ? 5v maximum junction temperature (t j )......................... 150c storage temperature (t s)........................... ?65c to 150c lead temperature (soldering, 10s )............................ 260c esd hbm rating (3) ......................................................... 2kv esd mm rating (3) .........................................................200v operating ratings (2) supply voltage (v s )....................................... +4.5v to +20v junction temperature (t j ) ........................ ?40c to +125c package thermal resistance epad soic-8 ( ja ) .............................................41c/w epad soic-8( jc )???????...????14.7c/w electrical characteristics (4) 4.5v v s 20v; t a = + 25c, bold values indicate ?40 c t j +125 c, unless noted. input voltage slew rate > 2.5v/s. symbol parameter condition min. typ. max. units input v ih logic 1 input voltage 2.4 1.6 v v il logic 0 input voltage 1.45 0.8 v i in input current 0v v in v s ?1 ?10 1 10 a output v oh high output voltage i out = 100 a v s ? 0.025 v v ol low output voltage i out = ?100 a 0.025 v i out = 10ma, v s = 20v 2.3 5 output resistance hi state i out = 10ma, v s = 20v 8 i out = 10ma, v s = 20v 2.2 5 r o output resistance lo state i out = 10ma, v s = 20v 8 i pk peak output current 3 a i latch-up protection withstand reverse current > 200 ma switching time t r rise time test figure 1, c l = 1800pf, v s = 20v 11 35 60 ns t f fall time test figure 1, c l = 1800pf, v s = 20v 11 35 60 ns t d1 delay time test figure 1, c l = 1800pf, v s = 20v 40 75 100 ns t d2 delay time test figure 1, c l = 1800pf, v s = 20v 60 75 100 ns power supply i s power supply current v in = 3.0v (both inputs) 0.75 1.5 2.0 ma i s power supply current v in = 0.0v (both inputs) 0.05 0.25 0.30 ma notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to function outside its operating rating. 3. devices are esd sensitive. handli ng precautions recommended. human body mo del, 1.5k in series with 100pf. 4. specification for packaged product only.
micrel, inc. maq4123/maq4124/maq4125 july 2011 5 m9999-072511-a test circuit figure 1a. inverting driver switching time figure 1b. non-inverting driver switching time
micrel, inc. maq4123/maq4124/maq4125 july 2011 6 m9999-072511-a typical characteristics supply current (i s ) vs. supply voltage 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 4 6 8 10 12 14 16 18 20 supply voltage (v) supply current (ma) v in = 3v v in = 0v supply current (i s ) vs. supply voltage 0 2 4 6 8 10 12 4 6 8 101214161820 supply voltage (v) supply current (ma) fs=100khz c l =1.8nf c l =1nf c l =0.47nf c l =0nf supply current (i s ) vs. supply voltage 0 5 10 15 20 25 30 35 40 45 50 4 6 8 101214161820 supply voltage (v) supply current (ma) fs=100khz c l =10nf c l =3.3nf c l =4.7nf input pin current (i in ) vs. supply voltage 0 5 10 15 20 25 30 35 40 4 6 8 101214161820 supply voltage (v) current (na) v in =5v v in =v s input pin threshold voltage vs. supply voltage 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 4 6 8 101214161820 supply voltage (v) input threshold (v) input rising input falling output voltage vs. supply voltage 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 4 6 8 10 12 14 16 18 20 supply voltage (v) output voltage (mv) v s -v oh v ol i out =100 a output resistance vs. supply voltage 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 4 6 8 101214161820 supply voltage (v) rds on ( ? ) source sink peak output current vs. supply voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 4 6 8 10 12 14 16 18 20 supply voltage (v) peak current (a) output clamped at 5v sink source output rise/fall time vs. supply voltage 0 2 4 6 8 10 12 14 16 18 20 22 24 4 6 8 10 12 14 16 18 20 supply voltage (v) t r /t f (ns) t r t f c l =1.8nf
micrel, inc. maq4123/maq4124/maq4125 july 2011 7 m9999-072511-a typical characteristics (continued) propagation delay time vs. supply voltage 30 35 40 45 50 55 60 65 70 4 6 8 101214161820 supply voltage (v) t d1 /t d2 (ns) t d1 t d2 inverting driver c l =1.8nf propagation delay time vs. supply voltage 30 40 50 60 70 80 90 100 110 4 6 8 101214161820 supply voltage (v) t d1 /t d2 (ns) t d1 t d2 non-inverting driver c l =1.8nf pulse stretching vs. supply voltage 60 65 70 75 80 85 90 95 100 4 6 8 10 12 14 16 18 20 supply voltage (v) output pulse width (ns) c l =1.8nf input pulse width = 50ns supply current (i s ) vs. temperature 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 -50 -25 0 25 50 75 100 125 150 temperature (c) supply current (ma) 5v s v in = 0v 12v s 20v s supply current (i s ) vs. temperature 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -50 -25 0 25 50 75 100 125 150 temperature (c) supply current (ma) 5v s 12v s 20v s v in =v s supply current (i s ) vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 150 temperature (c) supply current (ma) 5v s 12v s 20v s v in =100khz c l =0nf supply current (i s ) vs. temperature 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -50 -25 0 25 50 75 100 125 150 temperature (c) supply current (ma) 5v s v in = 100khz c l = 1.8nf 12v s 20v s input pin current (i in ) vs. temperature 0 20 40 60 80 100 120 140 160 180 200 -50 -25 0 25 50 75 100 125 150 temperature (c) input pin current (na) 5v s 12v s 20v s v in =v s input pin current (i in ) vs. temperature 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 150 temperature (c) input pin current (na) 5v s 12v s 20v s v in =5v
micrel, inc. maq4123/maq4124/maq4125 july 2011 8 m9999-072511-a typical characteristics (continued) input pin rising threshold vs. temperature 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 -50 -25 0 25 50 75 100 125 150 temperature (c) v in threshold (v) 5v s 12v s 20v s input pin falling threshold vs. temperature 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 -50 -25 0 25 50 75 100 125 150 temperature (c) v in threshold (v) 5v s 12v s 20v s v oh vs. temperature 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 temperature (c) v oh (mv) 5v s 12v s 20v s v ol vs. temperature 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 -50 -25 0 25 50 75 100 125 150 temperature (c) v ol (mv) 5v s 12v s 20v s output source resistance vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 150 temperature (c) rds on ( ? ) 5v s 12v s 20v s output sink resistance vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 150 temperature (c) rds on ( ? ) 5v s 12v s 20v s output rise time vs. temperature 0 5 10 15 20 25 30 35 -50 -25 0 25 50 75 100 125 150 temperature (c) t r (ns) 5v s 12v s 20v s c l =1.8nf output fall time vs. temperature 0 5 10 15 20 25 30 -50 -25 0 25 50 75 100 125 150 temperature (c) t f (ns) 5v s 12v s 20v s c l =1.8nf output t d1 time vs. temperature 30 40 50 60 70 80 90 100 -50 -25 0 25 50 75 100 125 150 temperature (c) t d1 (ns) 5v s 12v s 20v s non-inverting driver c l =1.8nf
micrel, inc. maq4123/maq4124/maq4125 july 2011 9 m9999-072511-a typical characteristics (continued) output t d2 time vs. temperature 50 60 70 80 90 100 110 120 -50 -25 0 25 50 75 100 125 150 temperature (c) t d2 (ns) 5v s 12v s 20v s non-inverting drive r c l =1.8nf output t d1 time vs. temperature 30 35 40 45 50 55 60 65 70 -50 -25 0 25 50 75 100 125 150 temperature (c) t d1 (ns) 5v s 12v s 20v s inverting drive r c l =1.8nf output t d2 time vs. temperature 30 35 40 45 50 55 60 65 70 -50 -25 0 25 50 75 100 125 150 temperature (c) t d2 (ns) 5v s 12v s 20v s inverting drive r c l =1.8nf pulse stretching (v out1 ) vs. temperature 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 -50 -25 0 25 50 75 100 125 150 temperature (c) output pulse width (ns) 5v s 12v s 20v s c l =1.8nf input pulse width = 50ns supply current (i s ) vs. switching frequency 0 5 10 15 20 25 30 35 40 45 50 10.0 100.0 1000.0 frequency (khz) supply current (ma) c l =0nf 5v s 12v s 20v s supply current (i s ) vs. switching frequency 0 5 10 15 20 25 30 35 40 45 50 10.0 100.0 1000.0 frequency (khz) supply current (ma) c l =1.8nf 5v s 12v s 20v s output rise time vs. load capacitance (c l ) 0 10 20 30 40 50 60 70 80 90 100 110 120 0123456789101112 c l (nf) rise time (ns) 20v s 12v s 5v s output fall time vs. load capacitance (c l ) 0 10 20 30 40 50 60 70 80 90 100 110 120 0123456789101112 c l (nf) fall time (ns) 20v s 12v s 5v s t d1 delay vs. load capacitance (c l ) 0 10 20 30 40 50 60 70 80 90 100 110 120 0 1 2 3 4 5 6 7 8 9 10 11 12 c l (nf) t d1 (ns) 20v s 12v s 5v s
micrel, inc. maq4123/maq4124/maq4125 july 2011 10 m9999-072511-a typical characteristics (continued) t d2 delay vs. load capacitance (c l ) 0 10 20 30 40 50 60 70 80 90 100 110 120 0123456789101112 c l (nf) t d2 (ns) 20v s 12v s 5v s input pin current (i in ) vs. negative v in 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -7 -6 -5 -4 -3 -2 -1 0 v in (v) i in (ma) 20v s 12v s 5v s supply current (i s ) vs. negative v in 0 20 40 60 80 100 120 140 160 180 200 220 -7 -6 -5 -4 -3 -2 -1 0 v in (v) i s (a) 20v s 12v s 5v s negative i in vs. negative v in -8 -7 -6 -5 -4 -3 -2 -1 0 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 v in (v) i in (ma) v s =12v 25c 125c input pulse width vs. output pulse width 10 100 1000 10 100 1000 t pw_input (ns) t pw_output (ns) 20v s 12v s 4.5v s
micrel, inc. maq4123/maq4124/maq4125 july 2011 11 m9999-072511-a application information the maq4123/24/25 drivers have been specifically constructed to operate reliably under any practical circumstances, the following details of usage provide for better operation of the device. supply bypassing charging and discharging large capacitive loads quickly requires large currents. for example, charging 2000pf from 0 to 15 volts in 20ns requires a constant current of 1.5a. in practice, the charging current is not constant, and will usually peak at around 3a. in order to charge the capacitor, the driver must be capable of drawing this much current, this quickly, from the system power supply. in turn, this means t hat as far as the driver is concerned, the system powe r supply, as seen by the driver, must have very low impedance. as a practical matter, this means the power supply bus decoupling capacitance must be much larger than the driver output load capacitance to achieve optimum driving speed. additionally , the bypassing capacitors must have very low internal inductance and resistance at all frequencies of interest. high quality x5r or x7r ceramic capacitors meet these requirements. two capacitors may be used to meet the decoupling requirements. a larger ceramic capacitor in the 1 f to 4.7 f range and a 0.1 f capacitor may be used, as together the valleys in their two impedance curves allow adequate performance over a broad enough band to get the job done. z5u type ceramic capacitor dielectrics are not recommended due to the large change in capacitance over temperature and voltage. the high pulse current demands of capacitive drivers also mean that the bypass capacitors must be mounted very close to the driver in order to prevent the effects of lead inductance or pcb land inductance from nullifying what the designer is trying to accomplish. for optimum results, the sum of the length s of the leads and the lands from the capacitor body to the driver body should total 2.5cm or less. bypass capacitance, and its close mounting to the driver serves two purposes. not only does it allow optimum performance from the driver, it minimizes the amount of lead length radiating at high frequency during switching, (due to the large i) thus minimizing the amount of emi later available for system disruption and subsequent cleanup. it should also be noted that the actual frequency of the emi produced by a driver is not the clock frequency at which it is driven, but is related to the highest rate of change of current produced during switching, a frequency generally one or two orders of magnitude higher, and thus more difficult to filter if you let it permeate your system. good bypassing practice is essential to proper operation of high speed driver ics. grounding both proper bypassing and proper grounding are necessary for optimum driv er operation. bypassing capacitance only allows a driver to turn the load on. eventually (except in rare ci rcumstances) it is also necessary to turn the load o ff. this requires attention to the ground path. two things other than the driver affect the rate at which it is possible to turn a load off: the adequacy of the grounding available for the driver, and the inductance of the leads from the driver to the load. the latter will be discussed in a separate section. the epad package has an exposed pad under the package. it's important for good thermal performance that this pad is connected to a ground plane. best practice for a ground path is a well laid out ground plane. however, this is not always practical, though a poorly-laid out ground plane can be worse than none. attention to the paths taken by return currents, even in a ground plane, is essential. in general, the leads from the driver to its load, the driver to the power supply, and the driver to whatever is drivi ng it should all be as low in resistance and inductance as possible. of the three paths, the ground lead from the driver to the logic driving it, is most sensitive to re sistance or inductance, and ground current from the load is what is most likely to cause disruption. thus, these ground paths should be arranged so that they never share a land, or do so for as short a distance as is practical. to illustrate what can happen, consider the following: the inductance of a 2cm long land, 1.59mm (0.062") wide on a pcb with no ground plane is approximately 45nh. assuming a di/dt of 0.3a/ns (which will allow a current of 3a to flow after 10ns, and is thus slightly slow for these purposes) a voltage of 13.5v will develop along this land in response to our postulated i. for a 1cm land, (approximately 15nh) 4.5v is developed. either way, users employing ttl-level input signals to the driver will find that the response of a dr iver that has been seriously degraded by a common ground path for input to and output from the driver of the given dimensions. note that this is before accounting for any resistive drops in the circuit. the resistive drop in a 1.59mm (0.062") land of 2oz. copper carrying 3a will be about 4mv/cm (10mv/in) at dc, and the resist ance will increase with frequency as skin effect comes into play. the problem is most obvious in inverting drivers where the input and output currents are in phase so that any attempt to raise the driver?s input voltage (in order to turn the driver?s load off) is countered by the voltage developed on the common ground path as the driver attempts to do what it was supposed to. it takes very little common ground path, under these circumstances, to alter circuit operation drastically.
micrel, inc. maq4123/maq4124/maq4125 july 2011 12 m9999-072511-a output lead inductance the same descriptions just given for pcb land inductance apply equally well for the output leads from a driver to its load, except that commonly the load is located much further away from the driver than the driver?s ground bus. generally, the best way to treat the output lead inductance problem, when distances greater than 4cm (2") are involved, requires treating the output leads as a transmission line. unfortunately, as both the output impedance of the driver and the input impedance of the mosfet gate are at least an order of magnitude lower than the impedance of common coax, using coax is seldom a cost-effective solution. a twisted pair works about as well, is generally lower in cost, and allows use of a wider variety of connectors. the second wire of the twisted pair should carry common from as close as possible to the ground pin of the driver directly to the ground terminal of the load. do not use a twisted pair where the second wire in the pair is the output of the other driver, as this will not provide a complete current path for either driver. likewise, do not use a twisted triad with two outputs and a common return unless both of the loads to be driver are mounted extremely close to each other, and you can guarantee that they will never be switching at the same time. for output leads on a printed circuit, the general rule is to make them as short and as wide as possible. the lands should also be treated as transmission lines: i.e., minimize sharp bends, or narrowing in the land, as these will cause ringing. for a rough estimate, on a 1.59mm (0.062") thick g-10 pcb a pair of opposing lands each 2.36mm (0.093") wide translates to a characteristic impedance of about 50 ? ; half that width suffices on a 0.787mm (0.031") thick board. for accurate impedance matching with a maq4123/24/25 driver, on a 1.59mm (0.062") board a land width of 42.75mm (1.683") would be required, due to the low im pedance of the driver and (usually) its load. this is obviously impractical under most circumstances. generally the tradeoff point between lands and wires comes when lands narrower than 3.18mm (0.125") would be required on a 1.59mm (0.062") board. to obtain minimum delay between the driver and the load, it is considered best to locate the driver as close as possible to the load (using adequate bypassing). using matching transformers at bot h ends of a piece of coax, or several matched lengths of coax between the driver and the load, works in theory, but is not optimum. driving at controlled rates occasionally, there are situat ions where a controlled rise or fall time (which may be considerably longer than the normal rise or fall time of the driver?s output) is desired for a load. in such cases, it is still prudent to employ best possible practice in terms of bypassing, grounding and pcb layout, and then reduce the switching speed of the load (not the driver) by adding a non-inductive series resistor of appropriate va lue between the output of the driver and the load. for situat ions where only the rise or only fall should be slowed, the resistor can be paralleled with a fast diode so that switching in the other direction remains fast. due to the schmitt-trigger action of the driver?s input it is not possible to slow the rate of rise (or fall) of the driver?s input signal to achieve slowing of the output. input stage the input stage of the maq4123/24/25 consists of a single-mosfet class a stage with an input capacitance of ~6pf. this capacitance represents the maximum load from the driver that will be seen by its controlling logic. the drain load on the input mosfet is a current source. thus, the quiescent current drawn by the driver varies, depending upon the logic state of the input. following the input stage, there is a buffer stage which provides hysteresis for the input. this prevents oscillations when slowly-changi ng input signals are used or when noise is present on the input. input voltage switching threshold is approximately 1.5v which makes the driver directly compatible with ttl signals, or with cmos powered from any supply voltage between 3v and 15v. the input protection circuitry of the maq4123/24/25, in addition to providing esd protection, also works to prevent latch-up or logic upset due to ringing or voltage spiking on the logic input terminal. in most cmos devices when the logic input rises above the power supply terminal, or descends below the ground terminal, the device can be destroyed or rendered inoperable until the power supply is cycled off and on. the maq4123/24/25 drivers have been designed to prevent this. input voltages excursions as great as 5v below ground will not alter the operation of the device. input excursions above the power supply voltage will result in the excess voltage being conducted to the power supply terminal of the ic.
micrel, inc. maq4123/maq4124/maq4125 july 2011 13 m9999-072511-a because the excess voltage is simply conducted to the power terminal, if the input to the driver is left in a high state when the power supply to the driver is turned off, currents as high as 30ma can be conducted through the driver from the input terminal to its power supply terminal. this may overload the output of whatever is driving the driver, and may cause other devices that share the driver?s power supply, as well as the driver, to operate when they are assumed to be off, but it will not harm the driver itself. excessive input voltage will also slow the driver down, and result in much longer internal propagation delays within the dr ivers. td2, for example, may increase to several hundred nanoseconds. in general, while the driver will ac cept this sort of misuse without damage, proper termination of the line feeding the driver so that line spiking and ringing are minimized, will always result in faster and more reliable operation of the device, leave less emi to be filtered elsewhere, be less stressful to other components in the circuit, and leave less chance of unintended modes of operation. power dissipation cmos circuits usually permit the user to ignore power dissipation. logic families such as 4000 series and 74cxxx have outputs which can only source or sink a few milliamps of current. even shorting the output of the device to ground or vcc may not damage the device. cmos drivers, on the other hand, are intended to source or sink several amps of cu rrent. this is necessary in order to drive large capacitive loads at frequencies into the megahertz range. package power dissipation of driver ics can easily be exceeded when driving large loads at high frequencies. care must therefore be paid to device dissipation when operating in this domain. the supply current vs. frequency and supply current vs. load characteristic curves furnished with this data sheet aid in estimating power dissipation in the driver. operating frequency, power supply voltage, and load all affect power dissipation. given the power dissipation in the device, and the thermal resistance of the package, junction operating temperature for any ambient is easy to calculate. for example, the thermal resist ance of the 8-pin epad soic package, from the datasheet, is 41c/w. in a 25c ambient, then, using a maximum junction temperature of 125c, this package will dissipate 2.4w. accurate power dissipation numbers can be obtained by summing the three sources of power dissipation in the device: ? load power dissipation (p l ) ? quiescent power dissipation (p q ) ? transition power dissipation (p t ) calculation of load power dissipation differs depending upon whether the load is capacitive, resistive or inductive. resistive load power dissipation dissipation caused by a resi stive load can be calculated as: p l = i 2 r o d where: i = the current drawn by the load r o = the output resistance of the driver when the output is high, at the power supply voltage used (see characteristic curves) d = fraction of time the load is conducting (duty cycle) capacitive load power dissipation dissipation caused by a capacitive load is simply the energy placed in, or remov ed from, the load capacitance by the driver. the energy stored in a capacitor is described by the equation: e = 1/2 c v 2 as this energy is lost in the driver each time the load is charged or discharged, for power dissipation calculations the 1/2 is removed. this equat ion also shows that it is good practice not to place more voltage in the capacitor than is necessary, as diss ipation increases as the square of the voltage applied to the capacitor. for a driver with a capacitive load: p l = f c (v s ) 2 where: f = operating frequency c = load capacitance v s = driver supply voltage
micrel, inc. maq4123/maq4124/maq4125 july 2011 14 m9999-072511-a inductive load power dissipation for inductive loads the situat ion is more complicated. for the part of the cycle in which the driver is actively forcing current into the inductor, the situation is the same as it is in the resistive case: p l1 = i 2 r o d however, in this instance the r o required may be either the on resistance of the driver when its output is in the high state, or its on resistanc e when the driver is in the low state, depending upon ho w the inductor is connected, and this is still only half the story. for the part of the cycle when the inductor is forcing current through the driver, dissipation is best described as: p l2 = i v d (1 ? d) where v d is the forward drop of the clamp diode in the driver (generally around 0.7v). the two parts of the load dissipation must be summed in to produce p l : p l = p l1 + p l2 quiescent power dissipation quiescent power dissipation (p q , as described in the input section) depends upon whether the input is high or low. a low input will result in a maximum supply current of 0.3ma (per driver); logic high will result in a maximum supply current of 1ma (per driver). quiescent power can therefore be found from: p q = v s [d i h + (1 ? d) i l ] where: i h = quiescent current with input high i l = quiescent current with input low d = fraction of time input is high (duty cycle) v s = power supply voltage transition power dissipation transition power is dissipated in the driver each time its output changes state, becaus e during the transition, for a very brief interval, both the n- and p-channel mosfets in the output totem-pole are on simultaneously, and a current is conducted through them from v s to ground. the transition power dissipation is approximately: p t = f v s (a s) where (a s) is a time-current factor derived from figure 2. figure 2. crossover energy loss total power (p d ) then, as previously described is just: p d = p l + p q +p t
micrel, inc. maq4123/maq4124/maq4125 july 2011 15 m9999-072511-a examples show the relative magnitude for each term: example 1 : a maq4123 operating on a 12v supply driving two capacitive loads of 3000pf each, operating at 250khz, with a duty cycle of 50%, in a maximum ambient of 60c. first calculate capacitive load power loss: p l = f x c x (v s ) 2 p l = 250,000 x (3 x 10 ?9 + 3 x 10 ?9 ) x 12 2 = 0.216w then transition power loss: p t = f x v s x (a s) = 250,000 12 2.2 x 10 ?9 = 0.007w then quiescent power loss: p q = v s x [d x i h + (1 ? d) x i l ] = 12 x [(0.5 x 0.002) + (0.5 x 0.0003)] = 0.014w total power dissipation, then, is: p d = 0.216 + 0.007 + 0.014 = 0.237w given that the epad soic package has a ja of 41c/w, this will result in the junction running at: 0.237w x 41c/w = 10c above ambient, which, given a maximum ambient temperature of 60c, will result in a maximum junction temperature of 70c. example 2 : a maq4124 operating on a 15v input, with one driver switching a 50 ? resistive load at 1mhz at a 67% duty cycle. the other driv er is not switching and its input is grounded. the maximum ambient temperature is 40c: p l = i 2 x r o x d first, i o must be determined: i o = v s / (r o + r load ) given r o from the characteristic curves then, i o = 15 / (3.3 + 50) i o = 0.281a and: p l = (0.281) 2 x 3.3 x 0.67 = 0.175w p t = f x v s x (a s)/2 (because only one side is operating) = (1,000,000 x 15 x 3.3 x 10 ?9 ) / 2 = 0.025 w and: p q = 15 x [(0.67 x 0.001) + (0.33 x 0.00015) + (1 x 0.00015)] = 0.013w then: p d = 0.175 + 0.025 + 0.013 = 0.213w for ja = 41c/w, the junction temperature at 40c ambient is: (0.213w x 41c/w) + 40c = 49c the actual junction temperat ure will be somewhat lower than calculated because the maximum r ds(on) value used was taken at a t j of 125c and the r ds(on) at t j = 52.8c lower.
micrel, inc. maq4123/maq4124/maq4125 july 2011 16 m9999-072511-a definitions c l = load capacitance in farads. d = duty cycle expressed as the fraction of time the input to the driver is high. f = operating frequency of the driver in hz. i h = power supply current drawn by a driver when both inputs are high and neither output is loaded. i l = power supply current drawn by a driver when both inputs are low and neither output is loaded. i d = output current from a driver in amps. p d = total power dissipated in a driver in watts. p l = power dissipated in the driver due to the driver?s load in watts. p q = power dissipated in a quiescent driver in watts. p t = power dissipated in a driver when the output changes states (?shoot-through current?) in watts. note: the ?shoot-through? current from a dual transition (once up, once down) for both drivers is stated in the graph on the following page in ampere-nanoseconds. this figure must be multiplied by the number of repetitions per second (frequency) to find watts. r o = output resistance of a driver in ? s. v s = power supply voltage to the ic in volts.
micrel, inc. maq4123/maq4124/maq4125 july 2011 17 m9999-072511-a package information 8-pin epad soic (me)
micrel, inc. maq4123/maq4124/maq4125 july 2011 18 m9999-072511-a recommended landing pattern 8-pin epad soic (me) red circle indicates thermal via. size should be .015 ? 0.17 inches in diameter and it should be connected to gnd plane for maximum thermal performance. micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2011 micrel, incorporated.

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